The RSP-100 PCI board (see Figure 1) demultiplexes data collected by the Racal Storeplex data recorder into separate channel buffers. This board is typically placed into a workstation, and used to transfer information from the Storeplex recorder into data files on the workstation disk drives. The RSP-100 board can sustain transfers at the full Storeplex data rate of 50 Mbps (6.4 MB/sec) and the full range of up to 64 channels for the full capacity of the workstation disk drives. If data is being played back from stored tape, the full tape capacity of 22 Gbytes can be transferred in real-time from tape to disk, with separate files for each of the channels.

Figure 1. RSP-100 PCI Board

The RSP-100 board ships with a driver that can be used with Windows NT 4.0/5.0. The driver interface includes both control of the board’s operation as well as transfer of data into the board. The board also ships with a data storage application that supports recording to high-rate SCSI drives (this requires at least a dual PentiumII-300 system with 4 separate 10,000 rpm drives to sustain the full data rate over the full channel range without any dropouts).

Figure 2 presents a block diagram of the RSP-100 board. Data is input to the HIPPI connector from the Storeplex Bus Monitor board. The parallel data/channel/timing values are transferred to the BITE FPGA, which either passes on the input data or can pass on one of three different BITE patterns. The COUNT FPGA uses the channel address to determine what to do with each 16-bit sample of data based on the latest value in the Configuration RAM; each channel can be independently configured for collection. The data is stored into RAM, with separate buffers for each channel. Whenever a 1 K-sample buffer of data is complete, the information is stored to the Buffer Ready FIFO, and the subsequent data is written to a new buffer. Each channel has 4 buffers of 1 Kword, to provide time before data is over-written.

Figure 2. RSP-100 Board Block Diagram

The 87C520 microcontroller is used to send configuration information to the FPGAs, to initiate transfer of a completed block buffer to the Output FIFOs, and to send an interrupt message to the host processor. Upon interrupt, the host PC initiates transfer of the 1 KW block buffer using the on-board bus-master DMA controller. This data is transferred from the RSP-100 board Output FIFO to an 8 MB Ring 0 circular buffer (this provides more than 1 second of buffering). The data storage application program periodically polls the device driver to transfer data up to a 24 MB Ring 3 circular buffer, and then writes the data to hard disk whenever enough data is available for any of the selected channels. When storing to disk, the timing constraints are important, and it is for this reason that the host PC must have dual PentiumII-300 processors and four SCSI disks running at 10,000 rpm to support recording 64 channels at full rate.

The RSP-100 board is available from stock, and can be delivered in two weeks. For purchase details, please contact Bruce Newnan at Integrated System Consultants (bnewnan@ix.netcom.com).

It is also possible to build complete channel recording and monitoring systems using the RSP-100 board and special software that has already been developed. The collection system architecture is easily expanded to over 16 Racal recorders and over 500 channels. The system architecture also includes a means to monitor a subset of the channels at a display workstation connected by Ethernet to each of the recording systems. For purchase details, please contact Bruce Newnan at Integrated System Consultants (bnewnan@ix.netcom.com).

Last modified: 21 August 1999